View BTS728-L2_1250524.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

profet ? bts 728 l2 semiconductor group page 1 of 1 2002-nov-28 smart high-side power switch two channels: 2 x 60m ? ? ? ? status feedback product summary package operating voltage v bb(on) 4.75...41v active channels one two parallel on-state resistance r on 60m ? 30m ? nominal load current i l(nom) 4.0a 6.0a current limitation i l(scr) 17a 17a general description ? n channel vertical power mosfet with charge pump, ground referenced cmos compatible input and diagnostic feedback, monolithically integrated in smart sipmos ? technology. ? fully protected by embedded protection functions applications ? c compatible high-side power switch with diagnostic feedback for 5v, 12v and 24v grounded loads ? all types of resistive, inductive and capacitve loads ? most suitable for loads with high inrush currents, so as lamps ? replaces electromechanical relays, fuses and discrete circuits basic functions ? very low standby current ? cmos compatible input ? improved electromagnetic compatibility (emc) ? fast demagnetization of inductive loads ? stable behaviour at undervoltage ? wide operating voltage range ? logic ground independent from load ground protection functions ? short circuit protection ? overload protection ? current limitation ? thermal shutdown ? overvoltage protection (including load dump) with external resistor ? reverse battery protection with external resistor ? loss of ground and loss of v bb protection ? electrostatic discharge protection (esd) diagnostic function ? diagnostic feedback with open drain output ? open load detection in on-state ? feedback of thermal shutdown in on-state block diagram p-dso-20-9 vbb logic channel 1 logic channel 2 in1 st1 in2 st2 gnd load 1 load 2 profet out 1 out 2
bts 728 l2 semiconductor group page 2 2002-nov-28 functional diagram pin definitions and functions pin symbol function 1,10, 11,12, 15,16, 19,20 v bb positive power supply voltage . design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance 3in1 input 1,2 , activates channel 1,2 in case of 7 in2 logic high signal 17,18 out1 output 1,2 , protected high-side power output 13,14 out2 of channel 1,2. design the wiring for the max. short circuit current 4st1 diagnostic feedback 1,2 of channel 1,2, 8 st2 open drain, low on failure 2 gnd1 ground 1 of chip 1 (channel 1) 6 gnd2 ground 2 of chip 2 (channel 2) 5,9 n.c. not connected pin configuration (top view) v bb 1 ? 20 v bb gnd1 2 19 v bb in1 3 18 out1 st1 4 17 out1 n.c. 5 16 v bb gnd2 6 15 v bb in2 7 14 out2 st2 8 13 out2 n.c. 9 12 v bb v bb 10 11 v bb out1 gnd1 overvoltage p rotection logic internal volta g e su pp l y esd temperature sensor clamp for inductive load gate control + charge pump current limit open load detection st1 vbb load in1 profet control and protection circuit of channel 2 in2 st2 out2 channel 1 gnd2
bts 728 l2 semiconductor group page 3 2002-nov-28 maximum ratings at t j = 25c unless otherwise specified parameter symbol values unit supply voltage (overvoltage protection see page 5) v bb 43 v supply voltage for full short circuit protection t j,start = -40 ...+150c v bb 24 v load current (short-circuit current, see page 6) i l self-limited a load dump protection 1 ) v loaddump = v a + v s , v a = 13.5 v r i 2 ) = 2 ? , t d = 200 ms; in = low or high, each channel loaded with r l = 8.0 ? , v load dump 3 ) 60 v operating temperature range storage temperature range t j t stg -40 ...+150 -55 ...+150 c 1 ) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins (a 150 ? resistor for the gnd connection is recommended. 2) r i = internal resistance of the load dump test pulse generator 3) v load dump is setup without the dut connected to the generator per iso 7637-1 and din 40839
bts 728 l2 semiconductor group page 4 2002-nov-28 power dissipation (dc) 4) t a = 25c: (all channels active) t a = 85c: p tot 3.7 1.9 w maximal switchable inductance, single pulse v bb = 12v, t j,start = 150c 4) , i l = 4.0 a, e as = 220 mj, 0 ? one channel: i l = 6.0 a, e as = 540 mj, 0 ? two parallel channels: see diagrams on page 10 z l 19.9 22.3 mh electrostatic discharge capability (esd) in: (human body model) st: out to all other pins shorted: acc. mil-std883d, method 3015.7 and esd assn. std. s5.1-1993 r=1.5k ? ; c=100pf v esd 1.0 4.0 8.0 kv input voltage (dc) v in -10 ... +16 v current through input pin (dc) current through status pin (dc) see internal circuit diagram page 9 i in i st 2.0 5.0 ma thermal characteristics parameter and conditions symbol values unit min typ max thermal resistance junction - soldering point 4),5) each channel: r thjs -- -- 13.5 k/w junction - ambient 4) one channel active: all channels active: r thja -- -- 41 34 -- -- 4 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m thick) copper area for v bb connection. pcb is vertical without blown air. see page 15 5 ) soldering point: upper side of solder edge of device pin 15. see page 15
bts 728 l2 semiconductor group page 5 2002-nov-28 electrical characteristics parameter and conditions, each of the two channels symbol values unit at t j = -40...+150c, v bb = 12 v unless otherwise specified min typ max load switching capabilities and characteristics on-state resistance (v bb to out); i l = 2 a, v bb 7v each channel, t j = 25c: t j = 150c: two parallel channels, t j = 25c: see diagram, page 11 r on -- 50 100 25 60 120 30 m ? nominal load current one channel active: two parallel channels active: device on pcb 6 ) , t a = 85c, t j 150c i l(nom) 3.6 5.5 4.0 6.0 -- a output current while gnd disconnected or pulled up; v bb = 30 v, v in = 0, see diagram page 9; (not tested specified by design) i l(gndhigh) -- -- 2 ma turn-on time 7 ) in to 90% v out : turn-off time in to 10% v out : r l = 12 ? t on t off 30 30 100 100 200 200 s slew rate on 7) t j = -40c: 10 to 30% v out , r l = 12 ? t j = 25c...150c: d v /dt on 0.15 0.15 -- -- 1 0.8 v/ s slew rate off 7) t j = -40c: 70 to 40% v out , r l = 12 ? t j = 25c...150c: -d v /dt off 0.15 0.15 -- -- 1 0.8 v/ s operating parameters operating voltage tj=-40 t j =25...150c: v bb(on) 4.75 -- -- 41 43 v overvoltage protection 8 ) t j =-40c: i bb = 40 ma t j =25...150c: v bb(az) 41 43 -- 47 -- 52 v standby current 9 ) t j =-40c...25c : v in = 0; see diagram page 10 t j =150c: i bb(off) -- -- 10 -- 18 50 a leakage output current (included in i bb(off) ) v in = 0 i l(off) -- 1 10 a operating current 10) , v in = 5v, i gnd = i gnd1 + i gnd2 , one channel on: two channels on: i gnd -- -- 0.8 1.6 1.5 3.0 ma 6 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m thick) copper area for v bb connection. pcb is vertical without blown air. see page 15 7 ) see timing diagram on page 12. 8) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins (a 150 ? resistor for the gnd connection is recommended). see also v on(cl) in table of protection functions and circuit diagram on page 9. 9 ) measured with load; for the whole device; all channels off 10 ) add i st , if i st > 0
bts 728 l2 parameter and conditions, each of the two channels symbol values unit at t j = -40...+150 c, v bb = 12 v unless otherwise specified min typ max semiconductor group page 6 2002-nov-28 protection functions current limit, (see timing diagrams, page 13) t j =-40 c: t j =25 c: t j =+150 c: i l(lim) 21 17 12 28 22 16 36 31 24 a repetitive short circuit current limit, t j = t jt each channel two parallel channels (see timing diagrams, page 13) i l(scr) -- -- 17 17 -- -- a initial short circuit shutdown time t j,start =25 c: (see timing diagrams on page 13) t off(sc) -- 2.4 -- ms output clamp (inductive load switch off) 11) at v on(cl) = v bb - v out , i l = 40 ma t j =-40 c: t j =25 c...150 c: v on(cl) 41 43 -- 47 -- 52 v thermal overload trip temperature t jt 150 -- -- c thermal hysteresis ? t jt -- 10 -- k reverse battery reverse battery voltage 12 ) - v bb -- -- 32 v drain-source diode voltage (v out > v bb ) i l = - 4.0 a, t j = +150 c - v on -- 600 -- mv 11 ) if channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest v on(cl) 12 ) requires a 150 ? resistor in gnd connection. the reverse load current through the intrinsic drain-source diode has to be limited by the connected load. power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. the temperature protection is not active during reverse current operation! input and status currents have to be limited (see max. ratings page 4 and circuit page 9).
bts 728 l2 parameter and conditions, each of the two channels symbol values unit at t j = -40...+150 c, v bb = 12 v unless otherwise specified min typ max semiconductor group page 7 2002-nov-28 diagnostic characteristics open load detection current, (on-condition) each channel i l (ol) 1 10 -- 500 ma input and status feedback 13 ) input resistance (see circuit page 9) r i 2.5 3.5 6 k ? input turn-on threshold voltage v in(t+) 1.7 -- 3.2 v input turn-off threshold voltage v in(t-) 1.5 -- -- v input threshold hysteresis ? v in(t) -- 0.5 -- v off state input current v in = 0.4 v: i in(off) 1--50 a on state input current v in = 5 v: i in(on) 20 50 90 a delay time for status with open load after switch off; ( see diagram on page 14) t d(st ol4) 100 520 900 s status invalid after positive input slope (open load) t d(st) -- -- 500 s status output (open drain) zener limit voltage i st = +1.6 ma: st low voltage i st = +1.6 ma: v st(high) v st(low) 5.4 -- 6.1 -- -- 0.4 v 13) if ground resistors r gnd are used, add the voltage drop across these resistors.
bts 728 l2 semiconductor group page 8 2002-nov-28 truth table channel 1 input 1 output 1 status 1 channel 2 input 2 output 2 status 2 level level bts 728l2 normal operation l h l h h h open load l h z h h l overtem- perature l h l l h l l = "low" level x = don't care z = high impedance, potential depends on external circuit h = "high" level status signal valid after the time delay shown in the timing diagrams parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel. the status outputs st1 and st2 have to be configured as a 'wired or' function with a single pull-up resistor. terms profet in1 st1 out1 gnd1 v bb v st1 v in1 i in1 v bb i l1 v out1 i gnd1 v on1 2 3 4 leadframe 17,18 i bb i st1 r gnd1 chip 1 profet in2 st2 out2 gnd2 v bb v st2 v in2 i in2 i l2 v out2 i gnd2 v on2 6 7 8 leadframe 13,14 i st2 r gnd2 chip 2 leadframe (v bb ) is connected to pin 1,10,11,12,15,16,19,20 external r gnd optional; two resistors r gnd1 , r gnd2 = 150 ? or a single resistor r gnd = 75 ? for reverse battery protection up to the max. operating voltage.
bts 728 l2 semiconductor group page 9 2002-nov-28 input circuit (esd protection), in1 or in2 in gnd i r esd-zd i i i the use of esd zener diodes as voltage clamp at dc conditions is not recommended. status output, st1 or st2 st gnd esd- zd +5v r st(on) esd-zener diode: 6.1 v typ., max 5.0 ma; r st(on) < 375 ? at 1.6 ma. the use of esd zener diodes as voltage clamp at dc conditions is not recommended. inductive and overvoltage output clamp, out1 or out2 +v bb out v z v on power gnd v on clamped to v on(cl) = 47 v typ. overvolt. and reverse batt. protection + v bb in st st r gnd gnd r signal gnd logic p ro fet v z2 i r v z1 load gnd load r out st r + 5v v z1 = 6.1 v typ., v z2 = 47 v typ., r gnd = 150 ? , r st = 15 k ? , r i = 3.5 k ? typ. in case of reverse battery the load current has to be limited by the load. temperature protection is not active open-load detection out1 or out2 on-state diagnostic open load, if v on < r on i l(ol) ; in high open load detection logic unit + v bb out on v on gnd disconnect profet v in st out gnd bb v bb v in v st v gnd any kind of load. in case of in = high is v out v in - v in(t+) . due to v gnd > 0, no v st = low signal available.
bts 728 l2 semiconductor group page 10 2002-nov-28 gnd disconnect with gnd pull up profet v in st out gnd bb v bb v gnd v in v st any kind of load. if v gnd > v in - v in(t+) device stays off due to v gnd > 0, no v st = low signal available. v bb disconnect with energized inductive load profet v in st out gnd bb v bb high for inductive load currents up to the limits defined by z l (max. ratings and diagram on page 10) each switch is protected against loss of v bb . consider at your pcb layout that in the case of vbb dis- connection with energized inductive load all the load current flows through the gnd connection. inductive load switch-off energy dissipation profet v in st out gnd bb = e e e e as bb l r e load r l l { l z energy stored in load inductance: e l = 1 / 2 l i 2 l while demagnetizing load inductance, the energy dissipated in profet is e as = e bb + e l - e r = v on(cl) i l (t) dt, with an approximate solution for r l > 0 ? : e as = i l l 2 r l ( v bb + |v out(cl) |) ln (1+ i l r l |v out(cl) | ) maximum allowable load inductance for a single switch off (one channel) 4) l = f (i l ); t j,start = 150 c, v bb = 12 v, r l = 0 ? z l [mh] 1 10 100 1000 23456789101112 i l [a]
bts 728 l2 semiconductor group page 11 2002-nov-28 typ. on-state resistance r on = f (v bb ,t j ) ; i l = 2 a, in = high r on [mohm] 12 5 100 75 50 25 0 3 5 7 9 30 40 tj = 150c 25c -40c v bb [v] typ. standby current i bb(off) = f (t j ) ; v bb = 9...34 v, in1,2 = low i bb(off) [ a] 0 5 10 15 20 25 30 35 40 45 -50 0 50 100 150 200 t j [ c]
bts 728 l2 semiconductor group page 12 2002-nov-28 figure 1a: v bb turn on: in2 v out1 t v bb st1 open drain in1 v out2 st2 open drain figure 2a: switching a resistive load, turn-on/off time and slew rate definition: in t v out i l t t on off 90% dv/dton dv/dtoff 10% figure 2b: switching a lamp: in st out l t v i the initial peak current should be limited by the lamp and not by the current limit of the device. figure 2c: switching an inductive load in st l t v i out i l(ol) timing diagrams both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2
bts 728 l2 semiconductor group page 13 2002-nov-28 *) if the time constant of load is too large, open-load-status may occur figure 3a: turn on into short circuit: shut down by overtemperature, restart by cooling other channel: normal operation t i st in1 l1 l(scr) i i l(lim) t off(sc) heating up of the chip may require several milliseconds, depending on external conditions figure 3b: turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2) t st1/2 in1/2 l1 l2 l(scr) i 2xi l(lim) i + i t off(sc) st1 and st2 have to be configured as a 'wired or' function st1/2 with a single pull-up resistor. figure 4a: overtemperature: reset if t j < t jt in st out j t v t figure 5a: open load: detection in on-state, open load occurs in on-state in st out l t v i open normal normal t d(st ol) t d(st ol) t d(st ol) = 10 s typ.
bts 728 l2 semiconductor group page 14 2002-nov-28 figure 5b: open load: turn on/off to open load in st l t i t d(stol4)
bts 728 l2 semiconductor group page 15 2002-nov-28 package and ordering code standard: p-dso-20-9 sales code bts 728 l2 ordering code q67060-s7014-a2 all dimensions in millimetres definition of soldering point with temperature t s : upper side of solder edge of device pin 15. p in 15 printed circuit board (fr4, 1.5mm thick, one layer 70 m, 6cm 2 active heatsink area) as a reference for max. power dissipation p tot , nominal load current i l(nom) and thermal resistance r thja published by siemens ag, bereich bauelemente, vertrieb, produkt-information, balanstra ? e 73, d-81541 m nchen siemens ag 2002. all rights reserved as far as patents or other rights of third parties are concerned, liability is only assumed for components per se, not for applications, processes and circuits implemented within components or assem- blies. the information describes a type of component and shall not be considered as warranted characteristics. the characteristics for which siemens grants a warranty will only be specified in the purchase contract. terms of delivery and rights to change design reserved. for questions on technology, delivery and prices please contact the offices of semiconductor group in germany or the siemens companies and representatives woldwide (see address list). due to technical requirements components may contain dan- gerous substances. for information on the type in question please contact your nearest siemens office, semiconductor group. siemens ag is an approved cecc manufacturer. packing: please use the recycling operators known to you. we can also help you - get in touch with your nearest sales office. by agreement we will take packing material back, if it is sorted. you must bear the costs of transport. for packing material that is re- turned to us unsorted or which we are not obliged to accept we shall have to invoice you for any costs incurred. components used in life-support devices or systems must be expressly authorised for such purpose! critical components 14 ) of the semiconductor group of siemens ag, may only be used in life supporting devices or systems 15 ) with the express written approval of the semiconductor group of siemens ag. 14) a critical component is a component used in a life-support device or system whose failure can reas onably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 15) life support devices or systems are int ended (a) to be implanted in the human body or (b) support and/or maintain and sustain and/or protect human life. if they fail, it is reasonably to assume that the health of the user or other persons may be endangered.

▲Up To Search▲

Price & Availability of BTS728-L2

	To Download BTS728-L2 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .